LMK00804BPWR

The LMK00804BPWR excels as a top-notch clock fanout buffer catering to the needs of advanced applications. With the ability to distribute up to four LVCMOS/LVTTL outputs from two selectable inputs, this device offers unmatched versatility and accuracy. Its internally synchronized clock enable input ensures a seamless transition without any runt or glitch pulses on the outputs. The outputs can be maintained in a logic low state when the clock is inactive, allowing for enhanced control. Boasting low additive jitter, a minimal phase noise floor, and guaranteed output and part-to-part skew characteristics, the LMK00804BPWR is the ultimate choice for applications requiring superior performance and consistency

Key Features

• Four LVCMOS/LVTTL Outputs with 7 Ω Output
  Impedance
  • Additive Jitter: 0.04 ps RMS (typ) @ 125 MHz
  • Noise Floor: –166 dBc/Hz (typ) @ 125 MHz
  • Output Frequency: 350 MHz (max)
  • Output Skew: 35 ps (max)
  • Part-to-Part Skew: 700 ps (max)
• Two Selectable Inputs
  • CLK, nCLK Pair Accepts LVPECL, LVDS,
    HCSL, SSTL, LVHSTL, or LVCMOS/LVTTL
  • LVCMOS_CLK Accepts LVCMOS/LVTTL
• Synchronous Clock Enable
• Core/Output Power Supplies:
  • 3.3 V/3.3 V
  • 3.3 V/2.5 V
  • 3.3 V/1.8 V
  • 3.3 V/1.5 V
• Package: 16-Lead TSSOP
• Industrial Temperature Range: –40ºC to +85ºC