LCMXO640C-3FTN256C
CPLD MachXO Family 320 Macro Cells 1.8V/2.5V/3.3V 256-Pin FTBGA Tray
| Quantity | Unit Price(USD) | Ext. Price |
|---|---|---|
| 1 | $18.913 | $18.91 |
| 200 | $7.319 | $1,463.80 |
| 500 | $7.062 | $3,531.00 |
| 1000 | $6.935 | $6,935.00 |
Inventory:7,017
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Part Number : LCMXO640C-3FTN256C
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Package/Case : CSBGA-256
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Brands : Lattice Semiconductor Corporation
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Components Categories : FPGAs (Field Programmable Gate Array)
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Datesheet : LCMXO640C-3FTN256C DataSheet (PDF)
Overview of LCMXO640C-3FTN256C
MachXO Field Programmable Gate Array (FPGA) IC 159 640 256-LBGA
Key Features
- Non-volatile, Infinitely Reconfigurable
- Instant-on – powers up in microseconds
- Single chip, no external configuration memory
- required
- Excellent design security, no bit stream to
- intercept
- Reconfigure SRAM based logic in milliseconds
- SRAM and non-volatile memory programmable
- through JTAG port
- Supports background programming of
- non-volatile memory
- Sleep Mode
- Allows up to 100x static current reduction
- TransFR™ Reconfiguration (TFR)
- In-field logic update while system operates
- High I/O to Logic Density
- 256 to 2280 LUT4s
- 73 to 271 I/Os with extensive package options
- Density migration supported
- Lead free/RoHS compliant packaging
- Embedded and Distributed Memory
- Up to 27.6 Kbits sysMEM™ Embedded Block
- RAM
- Up to 7.5 Kbits distributed RAM
- Dedicated FIFO control logic
- Flexible I/O Buffer
- Programmable sysIO™ buffer supports wide
- range of interfaces:
- − LVCMOS 3.3/2.5/1.8/1.5/1.2
- − LVTTL
- − PCI
- − LVDS, Bus-LVDS, LVPECL, RSDS
- sysCLOCK™ PLLs
- Up to two analog PLLs per device
- Clock multiply, divide, and phase shifting
- System Level Support
- IEEE Standard 1149.1 Boundary Scan
- Onboard oscillator
- Devices operate with 3.3V, 2.5V, 1.8V or 1.2V
- power supply
- IEEE 1532 compliant in-system programming
Specifications
The followings are basic parameters of the part selected concerning the characteristics of the part and categories it belongs to.
| Pbfree Code | Yes | Rohs Code | Yes |
| Part Life Cycle Code | Active | Ihs Manufacturer | LATTICE SEMICONDUCTOR CORP |
| Part Package Code | BGA | Package Description | FTBGA-256 |
| Pin Count | 256 | Reach Compliance Code | compliant |
| ECCN Code | EAR99 | HTS Code | 8542.39.00.01 |
| Samacsys Manufacturer | Lattice Semiconductor | JESD-30 Code | S-PBGA-B256 |
| JESD-609 Code | e1 | Length | 17 mm |
| Moisture Sensitivity Level | 3 | Number of CLBs | 80 |
| Number of Inputs | 159 | Number of Logic Cells | 640 |
| Number of Outputs | 159 | Number of Terminals | 256 |
| Operating Temperature-Max | 85 °C | Operating Temperature-Min | |
| Organization | 80 CLBS | Package Body Material | PLASTIC/EPOXY |
| Package Code | LBGA | Package Equivalence Code | BGA256,16X16,40 |
| Package Shape | SQUARE | Package Style | GRID ARRAY, LOW PROFILE |
| Peak Reflow Temperature (Cel) | 260 | Power Supplies | 1.8/2.5/3.3 V |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | Qualification Status | Not Qualified |
| Seated Height-Max | 1.7 mm | Supply Voltage-Max | 3.465 V |
| Supply Voltage-Min | 1.71 V | Supply Voltage-Nom | 1.8 V |
| Surface Mount | YES | Temperature Grade | OTHER |
| Terminal Finish | Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5) | Terminal Form | BALL |
| Terminal Pitch | 1 mm | Terminal Position | BOTTOM |
| Time@Peak Reflow Temperature-Max (s) | 40 | Width | 17 mm |
Warranty & Returns
Warranty, Returns, and Additional Information
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QA & Return Policy
Parts Quality Guarantee: 365 days
Returns for refund: within 90 days
Returns for Exchange: within 90 days
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Shipping and Package
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Parts Packaging Guarantee: Featuring 100% ESD anti-static protection, our packaging incorporates high toughness and superior buffering capabilities.
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