SST39VF040-70-4C-NHE

The SST39VF040-70-4C-NHE is a top-of-the-line flash memory device that boasts a whopping 5124K x8CMOS capacity. Utilizing innovative CMOS SuperFlash technology developed by SST, this device offers unparalleled performance and reliability. With a unique split-gate cell design and thick-oxide tunneling injector, the SST39VF040 ensures seamless read and write operations, outperforming its competitors in both reliability and manufacturability. Operating on a modest 2.7-3.6V power supply, this flash memory device is energy-efficient and cost-effective. The device also adheres to industry standards, making it compatible with JEDEC standard pinouts for x8 memories

Key Features

• Organized as 64K x8 / 128K x8 / 256K x8 / 512K x8
• Single Voltage Read and Write Operations– 3.0-3.6V for SST39LF512/010/020/040– 2.7-3.6V for SST39VF512/010/020/040
• Superior Reliability– Endurance: 100,000 Cycles (typical)– Greater than 100 years Data Retention
• Low Power Consumption(typical values at 14 MHz)– Active Current: 5 mA (typical)– Standby Current: 1 µA (typical)
• Sector-Erase Capability– Uniform 4 KByte sectors
• Fast Read Access Time:– 45 ns for SST39LF512/010/020/040– 55 ns for SST39LF020/040– 70 ns for SST39VF512/010/020/040
• Latched Address and Data
• Fast Erase and Byte-Program:– Sector-Erase Time: 18 ms (typical)– Chip-Erase Time: 70 ms (typical)– Byte-Program Time: 14 µs (typical)– Chip Rewrite Time:1 second (typical) for SST39LF/VF5122 seconds (typical) for SST39LF/VF0104 seconds (typical) for SST39LF/VF0208 seconds (typical) for SST39LF/VF040
• Automatic Write Timing– Internal VPP Generation
• End-of-Write Detection– Toggle Bit– Data# Polling
• CMOS I/O Compatibility
• JEDEC Standard– Flash EEPROM Pinouts and command sets
• Packages Available– 32-lead PLCC– 32-lead TSOP (8mm x 14mm)– 48-ball TFBGA (6mm x 8mm)– 34-ball WFBGA (4mm x 6mm) for 1M and 2M
• All devices are RoHS compliant