9ZML1233EKILF

Featuring a pin-compatible design with the 9ZML1232B, the 9ZML1233E represents a significant advancement in performance and functionality for server applications. This second generation derivative offers superior phase jitter performance and enhanced capabilities to meet the demands of modern computing environments. The fixed external feedback mechanism maintains stability for critical QPI/UPI applications, while the software adjustable input-to-output delay feature enables seamless management of transport delays in complex server setups. Additionally, the addition of an SMBus Write Lockout pin enhances the security of the device and system, providing a comprehensive solution for users seeking optimal performance and protection

Key Features

• SMBus write lock feature; increases system security
• 2 software-configurable input-to-output delay lines; manage transport delay for complex topologies
• LP-HCSL outputs; eliminate 24 resistors, save 41mm² of area
• 12 OE# pins; hardware control of each output
• 3 selectable SMBus addresses; multiple devices can share same SMBus segment
• Selectable PLL bandwidths; minimizes jitter peaking in cascaded PLL topologies
• Hardware/SMBus control of PLL bandwidth and bypass; change mode without power cycle
• Spread spectrum compatible; tracks spreading input clock for EMI reduction
• 100MHz PLL Mode; UPI support
• 10 x 10 mm 72-VFQFPN package; small board footprint