9DB1933AKLFT
19-output Differential Buffer For PCIe Gen3
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Part Number : 9DB1933AKLFT
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Package/Case : 72-VFQFN Exposed Pad
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Brands : Renesas
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Components Categories : Application Specific Clock/Timing
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Datesheet : 9DB1933AKLFT DataSheet (PDF)
Overview of 9DB1933AKLFT
The 9DB1933 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB1933 is driven by a differential SRC output pair from an IDT 932S421, 932SQ420, or equivalent, main clock generator. It attenuates jitter on the input clock and has a selectable PLL bandwidth to maximize performance in systems with or without Spread-Spectrum clocking.
Key Features
- 19 - 0.7 V current mode differential HCSL output pairs
- 8 Selectable SMBus Addresses/Multiple devices can share the same SMBus Segment
- 11 dedicated and 3 group OE# pins/Hardware control of the outputs
- PLL or bypass mode/PLL can dejitter incoming clock
- Selectable PLL bandwidth/minimizes jitter peaking in downstream PLL's
- Spread spectrum compatible, tracks spreading input clock for low EMI
- SMBus Interface, unused outputs can be disabled
- Supports undriven differential outputs in Power Down mode for power management
- Cycle-to-cycle jitter <50 ps
- Output-to-output skew < 150 ps
- PCIe Gen3 phase jitter < 1.0 ps RMS
Specifications
The followings are basic parameters of the part selected concerning the characteristics of the part and categories it belongs to.
| Pkg. Type | VFQFPN | Lead Count (#) | 72 |
| Temp. Grade | C | Pb (Lead) Free | Yes |
| Carrier Type | Reel |
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