854105AGLFT

Elevate your clock signal distribution with the advanced capabilities of the 854105AGLFT, a premium 1-to-4 LVCMOS/LVTTL-to-LVDS Clock Fanout Buffer known for its high performance and low skew. By utilizing cutting-edge Low Voltage Differential Signaling (LVDS) technology, this buffer offers a low power, low noise solution for distributing clock signals with precision over controlled impedances of 100Ω. With the ability to accept an LVCMOS/LVTTL input level and translate it to LVDS output levels, the 854105AGLFT guarantees reliable signal transmission and consistent output and part-to-part skew characteristics, making it the go-to choice for applications that demand top-notch performance and repeatability

Key Features

• Four differential LVDS output pairs
• One single-ended LVCMOS/LVTTL input
• CLK can accept the following input levels: LVCMOS, LVTTL
• Maximum output frequency: 250MHz
• Translates single-ended input signals to LVDS levels
• Additive phase jitter, RMS: 0.16ps (typical)
• Output skew: 55ps (maximum)
• Part-to-part skew: 350ps (maximum)
• Propagation delay: 1.62ns (maximum)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Available in lead-free (RoHS 6) package